Thread Pool Study
Which scheduling strategy actually holds up?
- Variants
- 9
- Block size
- 128
- Perf logs
- 54
- CPUs tested
- 3
- Commits
- 166
- Updated
- Mar 2025
System
How it fits together.
A simplified view of the moving parts, not a full architecture diagram.
- 019 variantssame kernel, different schedulers
- 02Correctnessdiff against baseline
- 03perf stat54 runs across 3 CPUs
- 04AnalysisCSV + notebook
Context
Why it exists.
A four-person course project asking a practical question: given the same blocked matrix multiplication, how do different thread-pool and scheduling strategies behave across CPUs?
Approach
- 01Put every variant behind one 548-line template class; each executable is a thin runner with a fixed 128 block size.
- 02Implement FIFO and LIFO pools with condition variables, a futures queue capped at hardware concurrency, TBB blocked_range2d, OpenMP, and CBLAS.
- 03Validate each variant against the single-threaded baseline before recording any numbers.
- 04Collect perf stat counters on three CPUs at matrix sizes 1024 and 4096, then analyze the CSV output in a notebook.
Inside the repository
What is actually in there.
Nine executables
Single, double, standard, async, FIFO, LIFO, TBB, BLAS, and OpenMP builds share one header and differ only in their runner.
Three machines
Threadripper 7960X, Ryzen 7 7735HS, and i7-7700HQ, each with size 1024 and 4096 runs.
Hardware counters
task-clock, cycles, instructions, branches, branch misses, L1 misses, and backend-bound stalls.
Reproducible scripts
Per-CPU shell scripts run the suite, check correctness, and archive the results with 7z.
Constraints & notes
Linux and clang only, since OpenBLAS and OpenMP are required. The perf event lists are CPU-specific, the scripts need sudo and 7z, and the README credits four authors and notes AI assistance for debugging.